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| Previous Datasheet Index Next Data Sheet Data Sheet No. PD-6.043C IR2101 HIGH AND LOW SIDE DRIVER Features n Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune n Gate drive supply range from 10 to 20V n Undervoltage lockout n 5V Schmitt-triggered input logic n Matched propagation delay for both channels n Outputs in phase with inputs Product Summary VOFFSET IO+/VOUT ton/off (typ.) Delay Matching 600V max. 100 mA / 210 mA 10 - 20V 130 & 90 ns 30 ns Description The IR2101 is a high voltage, high speed power MOSFET and IGBT driver with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL outputs. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts. Packages Typical Connection up to 600V VCC VCC HIN LIN VB HO VS LO TO LOAD HIN LIN COM To Order CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-1 Previous Datasheet Index Next Data Sheet IR2101 Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VCC VLO VIN dVs/dt PD RJA TJ TS TL Parameter Definition High Side Floating Supply Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side and Logic Fixed Supply Voltage Low Side Output Voltage Logic Input Voltage (HIN & LIN) Allowable Offset Supply Voltage Transient Package Power Dissipation @ TA +25C Thermal Resistance, Junction to Ambient Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds) (8 Lead DIP) (8 Lead SOIC) (8 Lead DIP) (8 Lead SOIC) Value Min. -0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 -- -- -- -- -- -- -55 -- Max. 625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 50 1.0 0.625 125 200 150 150 300 Units V V/ns W C/W C Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential. Symbol VB VS VHO VCC VLO VIN TA Parameter Definition High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side and Logic Fixed Supply Voltage Low Side Output Voltage Logic Input Voltage (HIN & LIN) Ambient Temperature Value Min. VS + 10 Note 1 VS 10 0 0 -40 Max. VS + 20 600 VB 20 VCC VCC 125 Units V C Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. B-2 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL To Order Previous Datasheet Index Next Data Sheet IR2101 Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25C unless otherwise specified. Symbol ton toff tr tf MT Parameter Definition Turn-On Propagation Delay Turn-Off Propagation Delay Turn-On Rise Time Turn-Off Fall Time Delay Matching, HS & LS Turn-On/Off Min. -- -- -- -- -- Value Typ. Max. Units Test Conditions 130 90 80 40 30 200 200 120 70 -- ns VS = 0V VS = 600V Static Electrical Characteristics VBIAS (VCC, VBS) = 15V and TA = 25C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol VIH VIL VOH VOL I LK I QBS IQCC IIN+ IINVCCUV+ VCCUVI O+ I O- Parameter Definition Logic "1" Input Voltage Logic "0" Input Voltage High Level Output Voltage, VBIAS - VO Low Level OutputVoltage, VO Offset Supply Leakage Current Quiescent VBS Supply Current QuiescentVCC Supply Current Logic "1" Input Bias Current Logic "0" Input Bias Current VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current Min. 2.7 -- -- -- -- -- -- -- -- 8.8 7.5 100 210 Value Typ. Max. Units Test Conditions -- -- -- -- -- 20 140 20 -- 9.3 8.2 125 250 -- 0.8 100 100 50 50 240 40 1.0 9.8 8.6 -- -- mA V A V mV VCC = 10V to 20V VCC = 10V to 20V IO = 0A IO = 0A VB = VS = 600V VIN = 0V or 5V VIN = 0V or 5V VIN = 5V VIN = 0V VO = 0V,VIN = 5V PW 10 s VO = 15V, VIN = 0V PW 10 s To Order CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-3 Previous Datasheet Index Next Data Sheet IR2101 Functional Block Diagram VB Q HV LEVEL SHIFT PULSE FILTER R S HO HIN PULSE GEN UV DETECT VS VCC LIN LO COM Lead Definitions Lead Symbol Description HIN LIN VB HO VS VCC LO COM Logic input for high side gate driver output (HO), in phase Logic input for low side gate driver output (LO), in phase High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return Lead Assignments 8 Lead DIP SO-8 IR2101 B-4 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL IR2101S To Order Previous Datasheet Index Next Data Sheet IR2101 Device Information Process & Design Rule Transistor Count Die Size Die Outline HVDCMOS 4.0 m 168 67 X 91 X 26 (mil) Thickness of Gate Oxide Connections First Layer Second Layer Contact Hole Dimension Insulation Layer Passivation Method of Saw Method of Die Bond Wire Bond Leadframe Material Width Spacing Thickness Material Width Spacing Thickness Material Thickness Material Thickness Package Remarks: Method Material Material Die Area Lead Plating Types Materials 800A Poly Silicon 4 m 6 m 5000A Al - Si (Si: 1.0% 0.1%) 6 m 9 m 20,000A 5 m X 5 m PSG (SiO2) 1.5 m PSG (SiO2) 1.5 m Full Cut Ablebond 84 - 1 Thermo Sonic Au (1.0 mil / 1.3 mil) Cu Ag Pb : Sn (37 : 63) 8 Lead PDIP / SO-8 EME6300 / MP150 / MP190 To Order CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-5 Previous Datasheet Index Next Data Sheet IR2101 HIN LIN HIN LIN ton 50% 50% tr 90% t off 90% tf HO LO Figure 1. Input/Output Timing Diagram HO LO 10% 10% Figure 2. Switching Time Waveform Definitions HIN LIN 50% 50% LO HO 10% MT 90% MT LO HO Figure 3. Delay Matching Waveform Definitions B-6 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL To Order |
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